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                                AT24C512C-MAHM-T
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                                                                    EEPROM

Microchip Tech

Fabricante:

Microchip Tech

Número de pieza del fabricante:

AT24C512C-MAHM-T

Paquete:

UDFN-8(2x3)

RoHS:
Ficha de datos:

AT24C512C-MAHM-T

Descripción:

UDFN-8(2x3) EEPROM ROHS

ECAD Model:
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AT24C512C-MAHM-T Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 Features  Low-voltage and Standard-voltage Operation ̶V CC = 1.7V to 3.6V ̶V CC = 2.5V to 5.5V  Internally Organized as 65,536 x 8 (512K)  I2C-Compatible (2-Wire) Serial Interface  Schmitt Triggers, Filtered Inputs for Noise Suppression  Bidirectional Data Transfer Protocol  400kHz (1.7V) and 1MHz (2.5V, 5.5V) Compatibility  Write Protect Pin for Hardware Data Protection  128-byte Page Write Mode ̶Partial Page Writes Allowed  Random and Sequential Read Modes  Self-timed Write Cycle (5ms Max)  High Reliability ̶Endurance: 1,000,000 Write Cycles ̶Data Retention: 40 Years  Green Package Options (Pb/Halide-free/RoHS Compliant) ̶8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-pad UDFN, 8-ball WLCSP, and 8-ball VFBGA Packages  Die sale Options: Wafer Form and Tape and Reel Available Description The Atmel ® AT24C512C provides 524,288 bits of Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized as 65,536 words of 8 bits each. The cascadable feature of the device allows up to eight devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-pad UDFN, 8-ball WLCSP, and 8-ball VFBGA packages. In addition, the entire family is available in 1.7V to 3.6V and 2.5V to 5.5V versions. AT24C512C I2C-Compatible (2-wire) Serial EEPROM 512-Kbit (65,536 x 8) DATASHEET AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 2 1. Pin Configurations and Pinouts Figure 1. Pin Configurations 2. Absolute Maximum Ratings Pin Name Function A0, A 1, A 2 Address Inputs GND Ground SDA Serial Data SCL Serial Clock Input WP Write Protect VCC Power Supply Note: Drawings are not to scale. 1 2 3 4 A0A1A2 GND 8 7 6 5 VCCWP SCL SDA 8-pad UDFN Top View 8-lead TSSOP Top View 1 2 3 48 7 6 5 A0A1A2 GNDV CCWP SCL SDA 1 2 3 4 A0 A1 A2 GND 8 7 6 5 VCC WP SCL SDA 8-lead SOIC Top View A0 A1 A2 GNDV CC WP SCL SDA 1 2 3 48 7 6 5 8-ball VFBGA Top View 8-ball WLSCP Top View SDA V CC SCL A 2 WP A 1 GND A 0 Operating Temperature . . . . . . . . . . .-55°C to +125°C Storage Temperature . . . . . . . . . . . . .-65°C to +150°C Voltage on any pin with respect to ground . . . . . . . . . . . . . -1.0V to +7.0V Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V DC Output Current . . . . . . . . . . . . . . . . . . . . . . .5.0mAStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 3 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 3. Block Diagram Figure 3-1. Block Diagram 4. Pin Descriptions Serial Clock (SCL) — The SCL input is used to positive-edge clock data into each EEPROM device and negative- edge clock data out of each device. Serial Data (SDA) — The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven, and may be wire-ORed with any number of other open-drain or open-collector devices. Device Addresses (A 2, A 1, A 0) — The A 2, A 1, and A 0 pins are device address inputs that are hardwired or left not connected for compatibility with other Atmel AT24Cxx devices. When the pins are hardwired, as many as eight 512K devices may be addressed on a single bus system (see Section 7. “Device Addressing” on page 9 for more details). If these pins are left floating, the A 2, A 1, and A 0 pins will be internally pulled down to GND. However, due to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the address pins to a known state. When using a pull-up resistor, Atmel recommends using 10k or less. Write Protect (WP) — The Write Protect input, when connected to GND, allows normal write operations. When WP pin is connected directly to V CC, all write operations to the memory are inhibited. If the pin is left floating, the WP pin will be internally pulled down to GND; however, due to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the WP pin to a known state. When using a pull-up resistor, Atmel recommends using 10k or less. Table 4-1. Write Protect Start Stop Logic VCC GND WP SCL SDA A 2A1A0 Serial Control LogicEN H.V. Pump/Timing EEPROM Data Recovery Serial MUX X DEC DOUT/ACK Logic COMP LOAD INC Data Word Addr/counter Y DEC R/W D OUT DIN LOAD Device Address Comparator WP Pin Status Part of the Array Protected At V CC Full Array At GND Normal Read/Write Operations AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 4 5. Memory Organization AT24C512C, 512-Kbit Serial EEPROM: The 512K is internally organized as 512 pages of 128 bytes each. Random word addressing requires a 16-bit data word address. 5.1 Pin Capacitance Table 5-1. Pin Capacitance (1) Note: 1. This parameter is characterized and is not 100% tested. 5.2 DC Characteristics Table 5-2. DC Characteristics Note: 1. V IL min and V IH max are reference only, and are not tested. Applicable over recommended operating range from T A = 25C, f = 1.0MHz, V CC = 5.5V. Symbol Test Condition Max Units Conditions CI/O Input/Output Capacitance (SDA) 8 pF VI/O = 0V CIN Input Capacitance (A 0, A 1, A 2, SCL) 6 pF VIN = 0V Applicable over recommended operating range from: T AI = -40C to +85C, V CC = 1.7V to 3.6V or 2.5V to 5.5V (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Units VCC1 Supply Voltage 1.7 3.6 V VCC2 Supply Voltage 2.5 5.5 V ICC1 Supply Current VCC = 3.6V Read at 400kHz 1.0 mA Write at 400kHz 3.0 mA ICC2 Supply Current VCC = 5.0V Read at 400kHz 2.0 mA Write at 400kHz 3.0 mA ISB1 Standby Current VCC = 1.7V VIN = V CC or V SS 1.0 μA VCC = 3.6V 3.0 μA ISB2 Standby Current VCC = 2.5V VIN = V CC or V SS 2.0 μA VCC = 5.5V 6.0 μA ILI Input Leakage Current VIN = V CC or VSS 0.10 3.0 μA ILO Output Leakage Current VOUT = V CC or VSS 0.05 3.0 μA VIL Input Low Level (1) -0.6 VCC x 0.3 V VIH Input High Level (1) VCC x 0.7 VCC + 0.5 V VOL1 Output Low Level VCC = 1.7V IOL = 0.15mA 0.2 V VOL2 Output Low Level VCC = 3.0V IOL = 2.1mA 0.4 V 5 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 5.3 AC Characteristics Table 5-3. AC Characteristics Notes: 1. This parameter is ensured by characterization only. 2. AC measurement conditions:  RL (connects to V CC): 1.3k (2.5V, 5V), 10k (1.7V)  Input pulse voltages: 0.3V CC to 0.7V CC  Input rise and fall times:  50ns  Input and output timing reference voltages: 0.5V CC Applicable over recommended operating range from T AI = -40C to +85C, V CC = 1.7V to 3.6V or 2.5V to 5.5V (where applicable), CL = 100pF (unless otherwise noted). Test conditions are listed in Note 2. Symbol Parameter 1.7V 2.5V, 5.0V Units Min Max Min Max fSCL Clock Frequency, SCL 400 1000 kHz tLOW Clock Pulse Width Low 1.3 0.4 μs tHIGH Clock Pulse Width High 0.6 0.4 μs tI Noise Suppression Time (1) 100 50 ns tAA Clock Low to Data Out Valid 0.05 0.9 0.05 0.55 μs tBUF Time the bus must be free before a new transmission can start (1) 1.3 0.5 μs tHD.STA Start Hold Time 0.6 0.25 μs tSU.STA Start Set-up Time 0.6 0.25 μs tHD.DAT Data In Hold Time 0 0 μs tSU.DAT Data In Set-up Time 100 100 ns tR Inputs Rise Time (1) 0.3 0.3 μs tF Inputs Fall Time (1) 300 100 ns tSU.STO Stop Set-up Time 0.6 0.25 μs tDH Data Out Hold Time 50 50 ns tWR Write Cycle Time 5 5 ms Endurance (1) 25°C, Page Mode, 3.3V 1,000,000 Write Cycles AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 6 6. Device Operation Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or Stop condition as defined below. Figure 6-1. Data Validity Start Condition: A high-to-low transition of SDA with SCL high is a Start condition, which must precede any other command. Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode. Figure 6-2. Start and Stop Definition SDA SCL Data Stable Data Stable Data Change SDA SCL Start Stop 7 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word. Figure 6-3. Output Acknowledge Standby Mode: The AT24C512C features a low-power standby mode, which is enabled:  Upon power-up and  After the receipt of the Stop condition and the completion of any internal operations. Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be protocol reset by following these steps: 1. Create a Start condition (if possible). 2. Clock nine cycles. 3. Create another Start condition followed by a Stop condition, as shown in Figure 6-4 below. The device should be ready for the next communication after above steps have been completed. In the event that the device is still non-responsive or remains active on the SDA bus, a power cycle must be used to reset the device. Figure 6-4. Software Reset SCL Data In Data Out Start Acknowledge 9 8 1 SCL 9 Start ConditionStart ConditionStop Condition 8 3 2 1 SDA Dummy Clock Cycles AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 8 Figure 6-5. Bus Timing SCL: Serial Clock, SDA: Serial Data I/O Figure 6-6. Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O Note: 1. The write cycle time, t WR , is the time from a valid Stop condition of a write sequence to the end of the internal clear/write cycle. SCL SDA IN SDA OUT tF tHIGH tLOW tLOW tR tAA tDH tBUF tSU.STO tSU.DAT tHD.DAT tHD.STA tSU.STA tWR (1) Stop ConditionStart Condition WORD N ACK 8 th Bit SCL SDA 9 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 7. Device Addressing The 512K EEPROM requires an 8-bit device address word following a Start condition to enable the chip for a read or write operation. The device address word consists of a mandatory ‘1010’ sequence for the first four most-significant bits (see Figure 7-1 below). This is common to all 2-wire EEPROM devices. The 512K uses the three device address bits, A2, A1, and A0, to allow as many as eight devices on the same bus. These bits must compare to their corresponding hardwired input pins. The A 2, A 1, and A 0 pins use an internal proprietary circuit that biases them to a logic low condition if the pins are allowed to float. The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high, and a write operation is initiated if this bit is low. Upon a compare of the device address, the EEPROM will output a zero. If a valid compare is not made, the device will return to a standby state. Figure 7-1. Device Address 8. Write Operations Byte Write: A Byte Write operation requires two 8-bit data word addresses following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero, and then the part is to receive an 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero. The addressing device, such as a microcontroller, then must terminate the write sequence with a Stop condition. At this time, the EEPROM enters an internally-timed write cycle, t WR , to the nonvolatile memory. All inputs are disabled during this write cycle, and the EEPROM will not respond until the write is complete (see Figure 8-1). Figure 8-1. Byte Write 512K1010A2A1A0R/W MSB LSB S T A R TW R I T ES T O P Device AddressFirst Word AddressSecond Word AddressData SDA Line M S BA C K R / W A C KA C KA C K AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 10Page Write: The 512-Kbit EEPROM is capable of 128-byte page writes. A Page Write is initiated the same way as a byte write, but the microcontroller does not send a Stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to 127 more data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the page write sequence with a Stop condition and the internally timed write cycle will begin. The lower seven bits of the data word address are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than 128 data words are transmitted to the EEPROM, the data word address will roll-over, and the previous data will be overwritten. The address roll over during write is from the last byte of the current page to the first byte of the same page. Figure 8-2. Page Write Acknowledge Polling: Once the internally-timed write cycle has started and the EEPROM inputs are disabled, Acknowledge Polling can be initiated. This involves sending a Start condition followed by the device address word. The read/write select bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero, allowing the read or write sequence to continue. Data Security: AT24C512C has a hardware data protection scheme that allows the user to write protect the entire memory when the WP pin is at V CC . SDA LineS T A R TW R I T E Device AddressFirst Word Address (n)Second Word Address (n)Data (n) Data (n + x) M S BA C K R / W A C KA C KA C KA C KS T O P 11 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 9. Read Operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three types of read operations: Current Address Read, Random Address Read, and Sequential Read. 9.1 Current Address Read The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address roll-over during read is from the last byte of the last memory page to the first byte of the first page. Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out on the SDA line. The microcontroller does not respond with an zero, but does generate a following Stop condition. Figure 9-1. Current Address Read 9.2 Random Read A Random Read requires an initial byte write sequence to load in the data word address. This is known as a “dummy write” operation. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another Start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero, but does generate a following Stop condition. Figure 9-2. Random Read Data Device Address S T A R TR E A DS T O P A C K M S BR / WN O A C K SDA Line SDA LINE S T A R TS T A R TR E A D W R I T ES T O P Device AddressSecond Word AddressDevice Address First Word Address Data (n) M S BA C KA C KA C K L S BA C KN O A C K R / W Dummy WriteR / W AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 12 9.3 Sequential Read Sequential Reads are initiated by either a Current Address Read or a Random Address Read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will roll-over and the sequential read will continue. The Sequential Read operation is terminated when the microcontroller does not respond with a zero but does generate a following Stop condition. Figure 9-3. Sequential Read SDA LINE S T A R T S T A R TR E A D W R I T E S T O P Device AddressSecond Word Address Device AddressFirst Word Address Data (n + 1) Data (n + 2) Data (n + x) Data (n) M S BA C KA C KA C K L S B A C KA C KA C KA C KN O A C K R / W Dummy Write . . . . . . R / W 13 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 10. Ordering Code Detail Atmel Designator Product Family Device Density Device RevisionShipping Carrier Option Operating Voltage Package Device Grade or Wafer/Die Thickness 512 = 512k 24C = Standard I 2C-compatible Serial EEPROMB = Bulk (Tubes) T = Tape and Reel, Standard Quantity Option E = Tape and Reel, Expanded Quantity Option M = 1.7V to 3.6V D = 2.5V to 5.5V Product Variation xx = Applies to select packages only. See ordering table for variation details. H = Green, NiPdAu Lead Finish, Industrial Temperature Range (-40°C to +85°C) U = Green, Matte Sn Lead Finish, Industrial Temperature Range (-40°C to +85°C) 11 = 11mil Wafer Thickness Package Option SS = JEDEC SOIC S = EIAJ SOIC X = TSSOP MA = UDFN U1 = WLCSP, 3x5 Grid Array C = VFBGA WWU = Wafer Unsawn AT24C512C-SSHMxx-T AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 14 11. Part Markings DRAWING NO.REV. TITLE Catalog Number Truncation AT24C512C Truncation Code: ### = 2FC AAAAAAAA ###% @ ATMLHYWW 8-lead SOIC 8-lead TSSOP AAAAAAA###% @ ATHYWW 8-pad UDFN ### H%@ YXX 2.0 x 3.0 mm Body 8-lead EIAJ AAAAAAAA ###% @ ATMLHYWW 1.5 x 2.0 mm Body 8-ball VFBGA PIN 1 ###U YMXX Note 2: Package drawings are not to scale Note 1: designates pin 1 8-ball WLCSP ATMEL ###% UYMXX 24C512CSM E3/25/13 24C512CSM, AT24C512C Package Marking Information Date Codes Voltages Y = Year M = Month WW = Work Week of Assembly % = Minimum Voltage 3: 2013 7: 2017 A: January 02: Week 2 M: 1.7V min 4: 2014 8: 2018 B: February 04: Week 4 D: 2.5V min 5: 2015 9: 2019 ... ... 6: 2016 0: 2020 L: December 52: Week 52 Country of Assembly Lot Number Grade/Lead Finish Material @ = Country of Assembly AAA...A = Atmel Wafer Lot Number H: Industrial/NiPdAu U: Industrial/Matte Tin Trace Code Atmel Truncation XX = Trace Code (Atmel Lot Numbers Correspond to Code) AT: Atmel Example: AA, AB.... YZ, ZZ ATM: Atmel ATML: Atmel AT24C512C: Package Marking Information Package Mark Contact: DL-CSO-Assy_eng@atmel.com 15 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 12. Ordering Information Notes: 1. WLCSP Package: CAUTION: Exposure to ultraviolet (UV) light can degrade the data stored in the EEPROM cells. Therefore, customers who use a WLCSP product must ensure that exposure to ultraviolet light does not occur 2. For wafer sales, please contact Atmel sales. Atmel Ordering Code Lead Finish Package Voltage Delivery Information Operation Range Form Quantity AT24C512C-SSHM-B NiPdAu (Lead-free/Halogen-free) 8S1 1.7V to 3.6V Bulk (Tubes) 100 per Tube Industrial Temperature (-40C to 85C) AT24C512C-SSHM-T Tape and Reel 4,000 per Reel AT24C512C-SSHD-B 2.5V to 5.5V Bulk (Tubes) 100 per Tube AT24C512C-SSHD-T Tape and Reel 4,000 per Reel AT24C512C-SHM-B 8S2 1.7V to 3.6V Bulk (Tubes) 95 per Tube AT24C512C-SHM-T Tape and Reel 2,000 per Reel AT24C512C-SHD-B 2.5V to 5.5V Bulk (Tubes) 95 per Tube AT24C512C-SHD-T Tape and Reel 2,000 per Reel AT24C512C-XHM-B 8X 1.7V to 3.6V Bulk (Tubes) 100 per Tube AT24C512C-XHM-T Tape and Reel 5,000 per Reel AT24C512C-XHD-B 2.5V to 5.5V Bulk (Tubes) 100 per Tube AT24C512C-XHD-T Tape and Reel 5,000 per Reel AT24C512C-MAHM-T 8MA2 1.7V to 3.6V 5,000 per Reel AT24C512C-MAHM-E 15,000 per Reel AT24C512C-U1UM-T (1) SnAgCu (Lead-free/Halogen-free) 8U-8 5,000 per Reel AT24C512C-CUM-T 8U2-1 AT24C512C-CUMHY-T AT24C512C-WWU11M (2) N/A Wafer Sale Note 2 Package Type 8S1 8-lead, 0.150” wide, Plastic Gull Wing, Small Outline (JEDEC SOIC) 8S2 8-lead, 0.208” wide, Plastic Gull Wing, Small Outline (EIAJ SOIC) 8X 8-lead, 4.40mm body, Plastic Thin Shrink Small Outline (TSSOP) 8MA2 8-pad, 2.00mm x 3.00mm body, 0.50mm Pitch, Ultra Thin Dual No Lead (UDFN) 8U-8 8-ball, 3 x 5 Grid Array, Wafer Level Chip Scale (WLCSP) 8U2-1 8-ball, 2.35mm x 3.73mm body, 0.75mm pitch, Small Die Ball Grid Array (VFBGA) AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 16 13. Package Information 13.1 8S1 — 8-lead JEDEC SOIC DRAWING NO. REV. TITLE GPCCOMMON DIMENSIONS (Unit of Measure = mm) SYMBOLMIN NOMMAX NOTE A1 0.10 – 0.25 A 1.35 – 1.75 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 E1 3.81 – 3.99 E 5.79 – 6.20 e 1.27 BSC L 0.40 – 1.27 ØØ 0° – 8° Ø E 1 N TOP VIEW C E1 END VIEW A b L A1 e D SIDE VIEW Package Drawing Contact: packagedrawings@atmel.com 8S1 G 6/22/11 Notes: This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC)SWB 17 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 13.2 8S2 — 8-lead EIAJ SOIC DRAWING NO. REV. TITLE GPC 8S2, 8-lead, 0.208” Body, Plastic Small Outline Package (EIAJ) 8S2 G 11/10/14 STN Package Drawing Contact: packagedrawings@atmel.com COMMON DIMENSIONS (Unit of Measure = mm) SYMBOLMIN NOMMAX NOTE Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs aren't included. 3. Determines the true geometric position. 4. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between 0.007 to .021 mm. A 1.70 2.16 A1 0.05 0.25 b 0.35 0.48 4 C 0.15 0.35 4 D 5.13 5.35 E1 5.18 5.40 2 E 7.70 8.26 L 0.51 0.85 q 0° 8° e 1.27 BSC 3 q 1 8 E TOP VIEW C E1 END VIEW A b L A1 e D SIDE VIEW AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 18 13.3 8X — 8-lead TSSOP DRAWING NO. REV. TITLE GPC COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A - - 1.20 A1 0.05 - 0.15 A2 0.80 1.00 1.05 D 2.90 3.00 3.10 2, 5 E 6.40 BSC E1 4.30 4.40 4.50 3, 5 b 0.19 0.25 0.30 4 e 0.65 BSC L 0.45 0.60 0.75 L1 1.00 REF C 0.09 - 0.20 Side View End View Top View A2 AL L1 D 1 E1 N b Pin 1 indicator this corner E e Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. 5. Dimension D and E1 to be determined at Datum Plane H. Package Drawing Contact: packagedrawings@atmel.com 8X E2/27/14 8X, 8-lead 4.4mm Body, Plastic Thin Shrink Small Outline Package (TSSOP)TNR C A1 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 19 13.4 8MA2 — 8-pad UDFN DRAWING NO. REV. TITLE GPC 8MA2 G 11/26/14 8MA2, 8-pad 2 x 3 x 0.6mm Body, Thermally Enhanced Plastic Ultra Thin Dual Flat No-Lead Package (UDFN) YNZ COMMON DIMENSIONS (Unit of Measure = mm) SYMBOLMIN NOMMAX NOTE A 0.50 0.55 0.60 A1 0.0 0.02 0.05 A2 - - 0.55 D 1.90 2.00 2.10 D2 1.40 1.50 1.60 E 2.90 3.00 3.10 E2 1.20 1.30 1.40 b 0.18 0.25 0.30 3 C 1.52 REF L 0.30 0.35 0.40 e 0.50 BSC K 0.20 - - TOP VIEW SIDE VIEW BOTTOM VIEW Package Drawing Contact: packagedrawings@atmel.com C E Pin 1 ID D 8 7 6 5 1 2 3 4 A A1 A2 D2 E2 e (6x) L (8x) b (8x) Pin#1 ID K 1 2 3 4 8 7 6 5 Notes: 1. This drawing is for general information only. Refer to Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. The Pin #1 ID is a laser-marked feature on Top View. 3. Dimensions b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. 4. The Pin #1 ID on the Bottom View is an orientation feature on the thermal pad. AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 20 13.5 8U-8 — 8-ball WLCSP DRAWING NO. REV. TITLE GPC 8U-8 A 4/11/13 8U-8, 8-ball Wafer Level Chip Scale Package (WLCSP) GRX COMMON DIMENSIONS (Unit of Measure = mm) SYMBOLMIN TYPMAX NOTE A 0.456 0.495 0.534 A1 0.16 - 0.22 A2 0.280 0.305 0.330 E Contact Atmel for details E1 0.866 E2 0.500 D Contact Atmel for details D1 1.000 D2 0.500 b 0.240 0.270 0.300 Package Drawing Contact: packagedrawings@atmel.com PIN ASSIGNMENT MATRIX 3 BOTTOM VIEW TOP VIEW D1 D -B- -A- d 0.015(4X) Øb(8X) jn 0.015 m C n0.05 m CAB -C- d 0.075 C SEATING PLANE A1 CORNER 1234 5 A1 CORNER 1 2 3 4 5 CBA D2 E2 C BA E E1 A A1 A2 12 A B CV CC SDAWP V SS SCLA 0 A1 A2 45 SIDE VIEW 21 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 13.6 8U2-1 — 8-ball VFBGA DRAWING NO. REV. TITLE GPC Package Drawing Contact: packagedrawings@atmel.com 8U2-1 G6/11/13 8U2-1, 8-ball, 2.35 x 3.73 mm Body, 0.75 mm pitch, Very Thin, Fine-Pitch Ball Grid Array Package (VFBGA)GWW COMMON DIMENSIONS (Unit of Measure = mm) SYMBOLMIN NOMMAX NOTE A 0.81 0.91 1.00 A1 0.15 0.20 0.25 A2 0.40 0.45 0.50 b 0.25 0.30 0.35 D 2.35 BSC E 3.73 BSC e 0.75 BSC e1 0.74 REF d 0.75 BSC d1 0.80 REF 2. Dimension 'b' is measured at the maximum solder ball diameter.1. This drawing is for general 3. Solder ball composition shall be 95.5Sn-4.0Ag-.5Cu. Notes: A d 0.08 C C f0.10 C A1 A2 Øb jn 0.15 m CAB jn 0.08 m C A (4X) d 0.10 B A1 BALL PA D CORNER D E SIDE VIEW TOP VIEW e (e1) d 21 D C B A A1 BALL PAD CORNER (d1) 8 SOLDER BALLS BOTTOM VIEW AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 22 14. Revision History Doc. Rev. Date Comments 8720G 09/2015 Added the AT24C512C-CUMHY-T package option. 8720F 01/2015 Added the UDFN expanded quantity option. Updated package outline drawings and the ordering information section. 8720E 08/2013 Correct spelling error. Correct subscript pin names on pinouts. Update the I CC1 and I CC2 supply currents in the DC Characteristics table. 8720D 03/2013 Added 8U-8 WLCSP package offering. Update related information throughout document. Update footers and disclaimer page. 8720C 07/2012 Update part markings. Update package drawings. Update template. 8720B 12/2010 Replace part markings with single page standard marking. Remove five ordering code variations. 8720A 09/2010 Initial document release. X X X X X X Atmel Corporation1600 Technology Drive, San Jose, CA 95110 USAT: (+1)(408) 441.0311F: (+1)(408) 436.4200| www.atmel.com © 2015 Atmel Corporation. / Rev.: Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015. Atmel ®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities ®, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and other countries. Other terms and product names may be trademarks of others. DISCLAIMER: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. 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SAFETY-CRITICAL, MILITARY, AND AUTOMOTIVE APPLICATIONS DISCLAIMER: Atmel products are not designed for and will not be used in connection with any applications where the failure of such products would reasonably be expected to result in significant personal injury or death (“Safety-Critical Applications”) without an Atmel officer's specific written consent. Safety-Critical Applications include, without limitation, life support devices and systems, equipment or systems for the operation of nuclear facilities and weapons systems. Atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by Atmel as military-grade. Atmel products are not designed nor intended for use in automotive applications unless specifically designated by Atmel as automotive-grade. chipmall Electronics Microchip:   AT24C512C1-10CI-2.7  AT24C512C1-10CC-2.7  AT24C512C-SSHM-T  AT24C512C-XHM-T  AT24C512C-XHM-B  AT24C512C-MAHM-T  AT24C512C-SSHM-B  AT24C512C-SHD-B  AT24C512C-SHD-T  AT24C512C-SSHD-B  AT24C512C-SSHD-T  AT24C512C-XHD-B  AT24C512C-XHD-T  AT24C512C-SSHMEU-T  AT24C512C-SHM-T  AT24C512C-U1UM-T  AT24C512C-MAHM-E  AT24C512C-CUM-T-923  AT24C512C-CUM-T-834  AT24C512C-CUM-T   AT24C512C-SHM-B AT24C512C-MAHM-T
AT24C512C-MAHM-T Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 Features  Low-voltage and Standard-voltage Operation ̶V CC = 1.7V to 3.6V ̶V CC = 2.5V to 5.5V  Internally Organized as 65,536 x 8 (512K)  I2C-Compatible (2-Wire) Serial Interface  Schmitt Triggers, Filtered Inputs for Noise Suppression  Bidirectional Data Transfer Protocol  400kHz (1.7V) and 1MHz (2.5V, 5.5V) Compatibility  Write Protect Pin for Hardware Data Protection  128-byte Page Write Mode ̶Partial Page Writes Allowed  Random and Sequential Read Modes  Self-timed Write Cycle (5ms Max)  High Reliability ̶Endurance: 1,000,000 Write Cycles ̶Data Retention: 40 Years  Green Package Options (Pb/Halide-free/RoHS Compliant) ̶8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-pad UDFN, 8-ball WLCSP, and 8-ball VFBGA Packages  Die sale Options: Wafer Form and Tape and Reel Available Description The Atmel ® AT24C512C provides 524,288 bits of Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized as 65,536 words of 8 bits each. The cascadable feature of the device allows up to eight devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, 8-pad UDFN, 8-ball WLCSP, and 8-ball VFBGA packages. In addition, the entire family is available in 1.7V to 3.6V and 2.5V to 5.5V versions. AT24C512C I2C-Compatible (2-wire) Serial EEPROM 512-Kbit (65,536 x 8) DATASHEET AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 2 1. Pin Configurations and Pinouts Figure 1. Pin Configurations 2. Absolute Maximum Ratings Pin Name Function A0, A 1, A 2 Address Inputs GND Ground SDA Serial Data SCL Serial Clock Input WP Write Protect VCC Power Supply Note: Drawings are not to scale. 1 2 3 4 A0A1A2 GND 8 7 6 5 VCCWP SCL SDA 8-pad UDFN Top View 8-lead TSSOP Top View 1 2 3 48 7 6 5 A0A1A2 GNDV CCWP SCL SDA 1 2 3 4 A0 A1 A2 GND 8 7 6 5 VCC WP SCL SDA 8-lead SOIC Top View A0 A1 A2 GNDV CC WP SCL SDA 1 2 3 48 7 6 5 8-ball VFBGA Top View 8-ball WLSCP Top View SDA V CC SCL A 2 WP A 1 GND A 0 Operating Temperature . . . . . . . . . . .-55°C to +125°C Storage Temperature . . . . . . . . . . . . .-65°C to +150°C Voltage on any pin with respect to ground . . . . . . . . . . . . . -1.0V to +7.0V Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V DC Output Current . . . . . . . . . . . . . . . . . . . . . . .5.0mAStresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 3 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 3. Block Diagram Figure 3-1. Block Diagram 4. Pin Descriptions Serial Clock (SCL) — The SCL input is used to positive-edge clock data into each EEPROM device and negative- edge clock data out of each device. Serial Data (SDA) — The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven, and may be wire-ORed with any number of other open-drain or open-collector devices. Device Addresses (A 2, A 1, A 0) — The A 2, A 1, and A 0 pins are device address inputs that are hardwired or left not connected for compatibility with other Atmel AT24Cxx devices. When the pins are hardwired, as many as eight 512K devices may be addressed on a single bus system (see Section 7. “Device Addressing” on page 9 for more details). If these pins are left floating, the A 2, A 1, and A 0 pins will be internally pulled down to GND. However, due to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the address pins to a known state. When using a pull-up resistor, Atmel recommends using 10k or less. Write Protect (WP) — The Write Protect input, when connected to GND, allows normal write operations. When WP pin is connected directly to V CC, all write operations to the memory are inhibited. If the pin is left floating, the WP pin will be internally pulled down to GND; however, due to capacitive coupling that may appear during customer applications, Atmel recommends always connecting the WP pin to a known state. When using a pull-up resistor, Atmel recommends using 10k or less. Table 4-1. Write Protect Start Stop Logic VCC GND WP SCL SDA A 2A1A0 Serial Control LogicEN H.V. Pump/Timing EEPROM Data Recovery Serial MUX X DEC DOUT/ACK Logic COMP LOAD INC Data Word Addr/counter Y DEC R/W D OUT DIN LOAD Device Address Comparator WP Pin Status Part of the Array Protected At V CC Full Array At GND Normal Read/Write Operations AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 4 5. Memory Organization AT24C512C, 512-Kbit Serial EEPROM: The 512K is internally organized as 512 pages of 128 bytes each. Random word addressing requires a 16-bit data word address. 5.1 Pin Capacitance Table 5-1. Pin Capacitance (1) Note: 1. This parameter is characterized and is not 100% tested. 5.2 DC Characteristics Table 5-2. DC Characteristics Note: 1. V IL min and V IH max are reference only, and are not tested. Applicable over recommended operating range from T A = 25C, f = 1.0MHz, V CC = 5.5V. Symbol Test Condition Max Units Conditions CI/O Input/Output Capacitance (SDA) 8 pF VI/O = 0V CIN Input Capacitance (A 0, A 1, A 2, SCL) 6 pF VIN = 0V Applicable over recommended operating range from: T AI = -40C to +85C, V CC = 1.7V to 3.6V or 2.5V to 5.5V (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Units VCC1 Supply Voltage 1.7 3.6 V VCC2 Supply Voltage 2.5 5.5 V ICC1 Supply Current VCC = 3.6V Read at 400kHz 1.0 mA Write at 400kHz 3.0 mA ICC2 Supply Current VCC = 5.0V Read at 400kHz 2.0 mA Write at 400kHz 3.0 mA ISB1 Standby Current VCC = 1.7V VIN = V CC or V SS 1.0 μA VCC = 3.6V 3.0 μA ISB2 Standby Current VCC = 2.5V VIN = V CC or V SS 2.0 μA VCC = 5.5V 6.0 μA ILI Input Leakage Current VIN = V CC or VSS 0.10 3.0 μA ILO Output Leakage Current VOUT = V CC or VSS 0.05 3.0 μA VIL Input Low Level (1) -0.6 VCC x 0.3 V VIH Input High Level (1) VCC x 0.7 VCC + 0.5 V VOL1 Output Low Level VCC = 1.7V IOL = 0.15mA 0.2 V VOL2 Output Low Level VCC = 3.0V IOL = 2.1mA 0.4 V 5 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 5.3 AC Characteristics Table 5-3. AC Characteristics Notes: 1. This parameter is ensured by characterization only. 2. AC measurement conditions:  RL (connects to V CC): 1.3k (2.5V, 5V), 10k (1.7V)  Input pulse voltages: 0.3V CC to 0.7V CC  Input rise and fall times:  50ns  Input and output timing reference voltages: 0.5V CC Applicable over recommended operating range from T AI = -40C to +85C, V CC = 1.7V to 3.6V or 2.5V to 5.5V (where applicable), CL = 100pF (unless otherwise noted). Test conditions are listed in Note 2. Symbol Parameter 1.7V 2.5V, 5.0V Units Min Max Min Max fSCL Clock Frequency, SCL 400 1000 kHz tLOW Clock Pulse Width Low 1.3 0.4 μs tHIGH Clock Pulse Width High 0.6 0.4 μs tI Noise Suppression Time (1) 100 50 ns tAA Clock Low to Data Out Valid 0.05 0.9 0.05 0.55 μs tBUF Time the bus must be free before a new transmission can start (1) 1.3 0.5 μs tHD.STA Start Hold Time 0.6 0.25 μs tSU.STA Start Set-up Time 0.6 0.25 μs tHD.DAT Data In Hold Time 0 0 μs tSU.DAT Data In Set-up Time 100 100 ns tR Inputs Rise Time (1) 0.3 0.3 μs tF Inputs Fall Time (1) 300 100 ns tSU.STO Stop Set-up Time 0.6 0.25 μs tDH Data Out Hold Time 50 50 ns tWR Write Cycle Time 5 5 ms Endurance (1) 25°C, Page Mode, 3.3V 1,000,000 Write Cycles AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 6 6. Device Operation Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or Stop condition as defined below. Figure 6-1. Data Validity Start Condition: A high-to-low transition of SDA with SCL high is a Start condition, which must precede any other command. Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode. Figure 6-2. Start and Stop Definition SDA SCL Data Stable Data Stable Data Change SDA SCL Start Stop 7 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word. Figure 6-3. Output Acknowledge Standby Mode: The AT24C512C features a low-power standby mode, which is enabled:  Upon power-up and  After the receipt of the Stop condition and the completion of any internal operations. Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be protocol reset by following these steps: 1. Create a Start condition (if possible). 2. Clock nine cycles. 3. Create another Start condition followed by a Stop condition, as shown in Figure 6-4 below. The device should be ready for the next communication after above steps have been completed. In the event that the device is still non-responsive or remains active on the SDA bus, a power cycle must be used to reset the device. Figure 6-4. Software Reset SCL Data In Data Out Start Acknowledge 9 8 1 SCL 9 Start ConditionStart ConditionStop Condition 8 3 2 1 SDA Dummy Clock Cycles AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 8 Figure 6-5. Bus Timing SCL: Serial Clock, SDA: Serial Data I/O Figure 6-6. Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O Note: 1. The write cycle time, t WR , is the time from a valid Stop condition of a write sequence to the end of the internal clear/write cycle. SCL SDA IN SDA OUT tF tHIGH tLOW tLOW tR tAA tDH tBUF tSU.STO tSU.DAT tHD.DAT tHD.STA tSU.STA tWR (1) Stop ConditionStart Condition WORD N ACK 8 th Bit SCL SDA 9 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 7. Device Addressing The 512K EEPROM requires an 8-bit device address word following a Start condition to enable the chip for a read or write operation. The device address word consists of a mandatory ‘1010’ sequence for the first four most-significant bits (see Figure 7-1 below). This is common to all 2-wire EEPROM devices. The 512K uses the three device address bits, A2, A1, and A0, to allow as many as eight devices on the same bus. These bits must compare to their corresponding hardwired input pins. The A 2, A 1, and A 0 pins use an internal proprietary circuit that biases them to a logic low condition if the pins are allowed to float. The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high, and a write operation is initiated if this bit is low. Upon a compare of the device address, the EEPROM will output a zero. If a valid compare is not made, the device will return to a standby state. Figure 7-1. Device Address 8. Write Operations Byte Write: A Byte Write operation requires two 8-bit data word addresses following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero, and then the part is to receive an 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero. The addressing device, such as a microcontroller, then must terminate the write sequence with a Stop condition. At this time, the EEPROM enters an internally-timed write cycle, t WR , to the nonvolatile memory. All inputs are disabled during this write cycle, and the EEPROM will not respond until the write is complete (see Figure 8-1). Figure 8-1. Byte Write 512K1010A2A1A0R/W MSB LSB S T A R TW R I T ES T O P Device AddressFirst Word AddressSecond Word AddressData SDA Line M S BA C K R / W A C KA C KA C K AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 10Page Write: The 512-Kbit EEPROM is capable of 128-byte page writes. A Page Write is initiated the same way as a byte write, but the microcontroller does not send a Stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to 127 more data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the page write sequence with a Stop condition and the internally timed write cycle will begin. The lower seven bits of the data word address are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than 128 data words are transmitted to the EEPROM, the data word address will roll-over, and the previous data will be overwritten. The address roll over during write is from the last byte of the current page to the first byte of the same page. Figure 8-2. Page Write Acknowledge Polling: Once the internally-timed write cycle has started and the EEPROM inputs are disabled, Acknowledge Polling can be initiated. This involves sending a Start condition followed by the device address word. The read/write select bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero, allowing the read or write sequence to continue. Data Security: AT24C512C has a hardware data protection scheme that allows the user to write protect the entire memory when the WP pin is at V CC . SDA LineS T A R TW R I T E Device AddressFirst Word Address (n)Second Word Address (n)Data (n) Data (n + x) M S BA C K R / W A C KA C KA C KA C KS T O P 11 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 9. Read Operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three types of read operations: Current Address Read, Random Address Read, and Sequential Read. 9.1 Current Address Read The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address roll-over during read is from the last byte of the last memory page to the first byte of the first page. Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out on the SDA line. The microcontroller does not respond with an zero, but does generate a following Stop condition. Figure 9-1. Current Address Read 9.2 Random Read A Random Read requires an initial byte write sequence to load in the data word address. This is known as a “dummy write” operation. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another Start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero, but does generate a following Stop condition. Figure 9-2. Random Read Data Device Address S T A R TR E A DS T O P A C K M S BR / WN O A C K SDA Line SDA LINE S T A R TS T A R TR E A D W R I T ES T O P Device AddressSecond Word AddressDevice Address First Word Address Data (n) M S BA C KA C KA C K L S BA C KN O A C K R / W Dummy WriteR / W AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 12 9.3 Sequential Read Sequential Reads are initiated by either a Current Address Read or a Random Address Read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will roll-over and the sequential read will continue. The Sequential Read operation is terminated when the microcontroller does not respond with a zero but does generate a following Stop condition. Figure 9-3. Sequential Read SDA LINE S T A R T S T A R TR E A D W R I T E S T O P Device AddressSecond Word Address Device AddressFirst Word Address Data (n + 1) Data (n + 2) Data (n + x) Data (n) M S BA C KA C KA C K L S B A C KA C KA C KA C KN O A C K R / W Dummy Write . . . . . . R / W 13 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 10. Ordering Code Detail Atmel Designator Product Family Device Density Device RevisionShipping Carrier Option Operating Voltage Package Device Grade or Wafer/Die Thickness 512 = 512k 24C = Standard I 2C-compatible Serial EEPROMB = Bulk (Tubes) T = Tape and Reel, Standard Quantity Option E = Tape and Reel, Expanded Quantity Option M = 1.7V to 3.6V D = 2.5V to 5.5V Product Variation xx = Applies to select packages only. See ordering table for variation details. H = Green, NiPdAu Lead Finish, Industrial Temperature Range (-40°C to +85°C) U = Green, Matte Sn Lead Finish, Industrial Temperature Range (-40°C to +85°C) 11 = 11mil Wafer Thickness Package Option SS = JEDEC SOIC S = EIAJ SOIC X = TSSOP MA = UDFN U1 = WLCSP, 3x5 Grid Array C = VFBGA WWU = Wafer Unsawn AT24C512C-SSHMxx-T AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 14 11. Part Markings DRAWING NO.REV. TITLE Catalog Number Truncation AT24C512C Truncation Code: ### = 2FC AAAAAAAA ###% @ ATMLHYWW 8-lead SOIC 8-lead TSSOP AAAAAAA###% @ ATHYWW 8-pad UDFN ### H%@ YXX 2.0 x 3.0 mm Body 8-lead EIAJ AAAAAAAA ###% @ ATMLHYWW 1.5 x 2.0 mm Body 8-ball VFBGA PIN 1 ###U YMXX Note 2: Package drawings are not to scale Note 1: designates pin 1 8-ball WLCSP ATMEL ###% UYMXX 24C512CSM E3/25/13 24C512CSM, AT24C512C Package Marking Information Date Codes Voltages Y = Year M = Month WW = Work Week of Assembly % = Minimum Voltage 3: 2013 7: 2017 A: January 02: Week 2 M: 1.7V min 4: 2014 8: 2018 B: February 04: Week 4 D: 2.5V min 5: 2015 9: 2019 ... ... 6: 2016 0: 2020 L: December 52: Week 52 Country of Assembly Lot Number Grade/Lead Finish Material @ = Country of Assembly AAA...A = Atmel Wafer Lot Number H: Industrial/NiPdAu U: Industrial/Matte Tin Trace Code Atmel Truncation XX = Trace Code (Atmel Lot Numbers Correspond to Code) AT: Atmel Example: AA, AB.... YZ, ZZ ATM: Atmel ATML: Atmel AT24C512C: Package Marking Information Package Mark Contact: DL-CSO-Assy_eng@atmel.com 15 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 12. Ordering Information Notes: 1. WLCSP Package: CAUTION: Exposure to ultraviolet (UV) light can degrade the data stored in the EEPROM cells. Therefore, customers who use a WLCSP product must ensure that exposure to ultraviolet light does not occur 2. For wafer sales, please contact Atmel sales. Atmel Ordering Code Lead Finish Package Voltage Delivery Information Operation Range Form Quantity AT24C512C-SSHM-B NiPdAu (Lead-free/Halogen-free) 8S1 1.7V to 3.6V Bulk (Tubes) 100 per Tube Industrial Temperature (-40C to 85C) AT24C512C-SSHM-T Tape and Reel 4,000 per Reel AT24C512C-SSHD-B 2.5V to 5.5V Bulk (Tubes) 100 per Tube AT24C512C-SSHD-T Tape and Reel 4,000 per Reel AT24C512C-SHM-B 8S2 1.7V to 3.6V Bulk (Tubes) 95 per Tube AT24C512C-SHM-T Tape and Reel 2,000 per Reel AT24C512C-SHD-B 2.5V to 5.5V Bulk (Tubes) 95 per Tube AT24C512C-SHD-T Tape and Reel 2,000 per Reel AT24C512C-XHM-B 8X 1.7V to 3.6V Bulk (Tubes) 100 per Tube AT24C512C-XHM-T Tape and Reel 5,000 per Reel AT24C512C-XHD-B 2.5V to 5.5V Bulk (Tubes) 100 per Tube AT24C512C-XHD-T Tape and Reel 5,000 per Reel AT24C512C-MAHM-T 8MA2 1.7V to 3.6V 5,000 per Reel AT24C512C-MAHM-E 15,000 per Reel AT24C512C-U1UM-T (1) SnAgCu (Lead-free/Halogen-free) 8U-8 5,000 per Reel AT24C512C-CUM-T 8U2-1 AT24C512C-CUMHY-T AT24C512C-WWU11M (2) N/A Wafer Sale Note 2 Package Type 8S1 8-lead, 0.150” wide, Plastic Gull Wing, Small Outline (JEDEC SOIC) 8S2 8-lead, 0.208” wide, Plastic Gull Wing, Small Outline (EIAJ SOIC) 8X 8-lead, 4.40mm body, Plastic Thin Shrink Small Outline (TSSOP) 8MA2 8-pad, 2.00mm x 3.00mm body, 0.50mm Pitch, Ultra Thin Dual No Lead (UDFN) 8U-8 8-ball, 3 x 5 Grid Array, Wafer Level Chip Scale (WLCSP) 8U2-1 8-ball, 2.35mm x 3.73mm body, 0.75mm pitch, Small Die Ball Grid Array (VFBGA) AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 16 13. Package Information 13.1 8S1 — 8-lead JEDEC SOIC DRAWING NO. REV. TITLE GPCCOMMON DIMENSIONS (Unit of Measure = mm) SYMBOLMIN NOMMAX NOTE A1 0.10 – 0.25 A 1.35 – 1.75 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 E1 3.81 – 3.99 E 5.79 – 6.20 e 1.27 BSC L 0.40 – 1.27 ØØ 0° – 8° Ø E 1 N TOP VIEW C E1 END VIEW A b L A1 e D SIDE VIEW Package Drawing Contact: packagedrawings@atmel.com 8S1 G 6/22/11 Notes: This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC)SWB 17 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 13.2 8S2 — 8-lead EIAJ SOIC DRAWING NO. REV. TITLE GPC 8S2, 8-lead, 0.208” Body, Plastic Small Outline Package (EIAJ) 8S2 G 11/10/14 STN Package Drawing Contact: packagedrawings@atmel.com COMMON DIMENSIONS (Unit of Measure = mm) SYMBOLMIN NOMMAX NOTE Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs aren't included. 3. Determines the true geometric position. 4. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between 0.007 to .021 mm. A 1.70 2.16 A1 0.05 0.25 b 0.35 0.48 4 C 0.15 0.35 4 D 5.13 5.35 E1 5.18 5.40 2 E 7.70 8.26 L 0.51 0.85 q 0° 8° e 1.27 BSC 3 q 1 8 E TOP VIEW C E1 END VIEW A b L A1 e D SIDE VIEW AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 18 13.3 8X — 8-lead TSSOP DRAWING NO. REV. TITLE GPC COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX NOTE A - - 1.20 A1 0.05 - 0.15 A2 0.80 1.00 1.05 D 2.90 3.00 3.10 2, 5 E 6.40 BSC E1 4.30 4.40 4.50 3, 5 b 0.19 0.25 0.30 4 e 0.65 BSC L 0.45 0.60 0.75 L1 1.00 REF C 0.09 - 0.20 Side View End View Top View A2 AL L1 D 1 E1 N b Pin 1 indicator this corner E e Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. 5. Dimension D and E1 to be determined at Datum Plane H. Package Drawing Contact: packagedrawings@atmel.com 8X E2/27/14 8X, 8-lead 4.4mm Body, Plastic Thin Shrink Small Outline Package (TSSOP)TNR C A1 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 19 13.4 8MA2 — 8-pad UDFN DRAWING NO. REV. TITLE GPC 8MA2 G 11/26/14 8MA2, 8-pad 2 x 3 x 0.6mm Body, Thermally Enhanced Plastic Ultra Thin Dual Flat No-Lead Package (UDFN) YNZ COMMON DIMENSIONS (Unit of Measure = mm) SYMBOLMIN NOMMAX NOTE A 0.50 0.55 0.60 A1 0.0 0.02 0.05 A2 - - 0.55 D 1.90 2.00 2.10 D2 1.40 1.50 1.60 E 2.90 3.00 3.10 E2 1.20 1.30 1.40 b 0.18 0.25 0.30 3 C 1.52 REF L 0.30 0.35 0.40 e 0.50 BSC K 0.20 - - TOP VIEW SIDE VIEW BOTTOM VIEW Package Drawing Contact: packagedrawings@atmel.com C E Pin 1 ID D 8 7 6 5 1 2 3 4 A A1 A2 D2 E2 e (6x) L (8x) b (8x) Pin#1 ID K 1 2 3 4 8 7 6 5 Notes: 1. This drawing is for general information only. Refer to Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. The Pin #1 ID is a laser-marked feature on Top View. 3. Dimensions b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. 4. The Pin #1 ID on the Bottom View is an orientation feature on the thermal pad. AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 20 13.5 8U-8 — 8-ball WLCSP DRAWING NO. REV. TITLE GPC 8U-8 A 4/11/13 8U-8, 8-ball Wafer Level Chip Scale Package (WLCSP) GRX COMMON DIMENSIONS (Unit of Measure = mm) SYMBOLMIN TYPMAX NOTE A 0.456 0.495 0.534 A1 0.16 - 0.22 A2 0.280 0.305 0.330 E Contact Atmel for details E1 0.866 E2 0.500 D Contact Atmel for details D1 1.000 D2 0.500 b 0.240 0.270 0.300 Package Drawing Contact: packagedrawings@atmel.com PIN ASSIGNMENT MATRIX 3 BOTTOM VIEW TOP VIEW D1 D -B- -A- d 0.015(4X) Øb(8X) jn 0.015 m C n0.05 m CAB -C- d 0.075 C SEATING PLANE A1 CORNER 1234 5 A1 CORNER 1 2 3 4 5 CBA D2 E2 C BA E E1 A A1 A2 12 A B CV CC SDAWP V SS SCLA 0 A1 A2 45 SIDE VIEW 21 AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 13.6 8U2-1 — 8-ball VFBGA DRAWING NO. REV. TITLE GPC Package Drawing Contact: packagedrawings@atmel.com 8U2-1 G6/11/13 8U2-1, 8-ball, 2.35 x 3.73 mm Body, 0.75 mm pitch, Very Thin, Fine-Pitch Ball Grid Array Package (VFBGA)GWW COMMON DIMENSIONS (Unit of Measure = mm) SYMBOLMIN NOMMAX NOTE A 0.81 0.91 1.00 A1 0.15 0.20 0.25 A2 0.40 0.45 0.50 b 0.25 0.30 0.35 D 2.35 BSC E 3.73 BSC e 0.75 BSC e1 0.74 REF d 0.75 BSC d1 0.80 REF 2. Dimension 'b' is measured at the maximum solder ball diameter.1. This drawing is for general 3. Solder ball composition shall be 95.5Sn-4.0Ag-.5Cu. Notes: A d 0.08 C C f0.10 C A1 A2 Øb jn 0.15 m CAB jn 0.08 m C A (4X) d 0.10 B A1 BALL PA D CORNER D E SIDE VIEW TOP VIEW e (e1) d 21 D C B A A1 BALL PAD CORNER (d1) 8 SOLDER BALLS BOTTOM VIEW AT24C512C [DATASHEET] Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015 22 14. Revision History Doc. Rev. Date Comments 8720G 09/2015 Added the AT24C512C-CUMHY-T package option. 8720F 01/2015 Added the UDFN expanded quantity option. Updated package outline drawings and the ordering information section. 8720E 08/2013 Correct spelling error. Correct subscript pin names on pinouts. Update the I CC1 and I CC2 supply currents in the DC Characteristics table. 8720D 03/2013 Added 8U-8 WLCSP package offering. Update related information throughout document. Update footers and disclaimer page. 8720C 07/2012 Update part markings. Update package drawings. Update template. 8720B 12/2010 Replace part markings with single page standard marking. Remove five ordering code variations. 8720A 09/2010 Initial document release. X X X X X X Atmel Corporation1600 Technology Drive, San Jose, CA 95110 USAT: (+1)(408) 441.0311F: (+1)(408) 436.4200| www.atmel.com © 2015 Atmel Corporation. / Rev.: Atmel-8720G-SEEPROM-AT24C512C-Datasheet_092015. Atmel ®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities ®, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and other countries. Other terms and product names may be trademarks of others. DISCLAIMER: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. SAFETY-CRITICAL, MILITARY, AND AUTOMOTIVE APPLICATIONS DISCLAIMER: Atmel products are not designed for and will not be used in connection with any applications where the failure of such products would reasonably be expected to result in significant personal injury or death (“Safety-Critical Applications”) without an Atmel officer's specific written consent. Safety-Critical Applications include, without limitation, life support devices and systems, equipment or systems for the operation of nuclear facilities and weapons systems. Atmel products are not designed nor intended for use in military or aerospace applications or environments unless specifically designated by Atmel as military-grade. Atmel products are not designed nor intended for use in automotive applications unless specifically designated by Atmel as automotive-grade. chipmall Electronics Microchip:   AT24C512C1-10CI-2.7  AT24C512C1-10CC-2.7  AT24C512C-SSHM-T  AT24C512C-XHM-T  AT24C512C-XHM-B  AT24C512C-MAHM-T  AT24C512C-SSHM-B  AT24C512C-SHD-B  AT24C512C-SHD-T  AT24C512C-SSHD-B  AT24C512C-SSHD-T  AT24C512C-XHD-B  AT24C512C-XHD-T  AT24C512C-SSHMEU-T  AT24C512C-SHM-T  AT24C512C-U1UM-T  AT24C512C-MAHM-E  AT24C512C-CUM-T-923  AT24C512C-CUM-T-834  AT24C512C-CUM-T   AT24C512C-SHM-B AT24C512C-MAHM-T
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8454
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